Rohit Bhan, Senior Staff Electrical Engineer with Renesas Electronics America, has developed highly specialized semiconductor industry expertise, providing multi-disciplinary engineering solutions to some of the world’s leading companies in the system-on-chip (SoC), ASIC, Digital Mixed Signal (DMS) and Analog Mixed Signal (AMS) domains for 20 years. While working closely with design and client users to architect and develop solutions from conception through silicon wafer fabrication, he has been recognized for his innovative achievements in the highest levels of AMS/DMS verification.

In the past decade, Rohit has focused on developing efficient, reusable, state-of-the-art chip verification environments and testbench structures using e-methodologies for complex Integrated Circuits (IC) in battery management systems used by the automotive industry. His end-to-end process and oversight experience ranges from the development of behavioral modeling of analog blocks for closed loop simulation, with digital design and analog behavioral models and/or transistors, to designing the solution and implementation of Oracle ERP EBS and Cloud systems to integrate with clients’ business requirements. Rohit additionally leads DMS/AMS verification for synchronous buck boost battery chargers for multi-cell combinations, among a broad array of technical and leadership responsibilities. He has previously contributed to developing six patented systems used in developing new ICs that defined battery management systems for one of the world’s top 10 semiconductor companies.

We spoke with Rohit about his experience in the semiconductor industry over two decades, and how e-methodologies are transforming design and verification in chip fabrication.

Q: Rohit, as electronic devices have—and will likely continue to—become more sophisticated, this must be an exciting time to be in the semiconductor industry. How critical is your work in chip design and verification to the integrated circuits that are used in thousands of electronic products, in every aspect of life?

A: Design Verification is a core activity in the semiconductor development process that ensures integrated circuits (ICs) are reliable, functional, and cost-effective. DV (design verification) plays a crucial role in the development process, impacting everything from product safety and performance to overall market success. The basic purpose of verification is to help in identifying and correcting design errors early in the development process, since given the complexity of modern ICs, which often contain millions of transistors, even a tiny “bug” or a mistake can lead to significant failures. Faulty chips can lead to malfunctioning products, which in turn can have serious consequences. By catching these errors before fabrication, verification reduces the risk of costly and potentially catastrophic failures in end products. Minimizing the number of design revisions required can also save significant amounts of money for a company, as the entire development process is an expensive proposition. Verification is not just about finding bugs; it is also about ensuring that the chip performs efficiently and can help optimize performance parameters such as speed, power consumption, and thermal management, which are critical for high-performance applications.

Q: Technology has changed tremendously over the past 20 years. How have innovative tools impacted the semiconductor industry overall, and more specifically in the area of design and verification? How have your work processes changed? What excites you about where these processes are heading?

A: As semiconductor designs have become more complex, many tools have enabled engineers to manage this complexity more effectively and efficiently. For example, many advanced tools support multi-functional and multi-core designs, allowing us to exercise and simulate sophisticated and compute-hungry chips. Electronic Design Automation (EDA) tools also provide sophisticated simulation and modeling capabilities, which can model complex behaviors and interactions within a chip, allowing designers to predict and resolve issues before physical prototypes are built. We use tools that integrate design and verification workflows with hardware emulation and prototyping systems that enhance the accuracy and relevance of testing.

When I first started in design verification approximately 15 years ago, we could only verify one block of design at a time. Now, with new tools and methodologies, we have the capability of simulating an entire chip to understand how the chip would behave in a real world scenario. This fast-changing pace of work, in which the technology is always evolving and improving, challenges us to up our game and keeps me hungry and pushing for more.

The future of the semiconductor industry is incredibly exciting, as the push toward smaller process nodes continues to drive improvements in performance, power efficiency, and density, and we are exploring alternative materials to overcome the limitations of silicon and enhance performance. Specialized chips for AI and machine learning, such as GPUs, TPUs, and FPGAs, are pushing the boundaries of what’s possible in data processing and artificial intelligence. Increasing collaboration between semiconductor companies and other industries like automotive and healthcare is pushing the development of new applications and solutions that leverage advanced semiconductor technologies.

Q: How did you enter the semiconductor industry, and what led you to specialize in the design and verification field?
A: I was always fascinated with computers and devices around me and was intrigued by how a tiny device controls big machines. When I first started my work in the semiconductor space, I saw a need for robust design and verification processes to ensure the reliability and performance of semiconductor devices. This is a vital area of expertise with significant career opportunities. DV is constantly evolving with new technologies, tools, and methods, and due to this dynamic nature, it provides ongoing learning and growth opportunities for professionals in the field. In the semiconductor field, Design Verification’s complexity, innovation, and critical importance make it an area of particular interest and significance.

Q: What can you tell us about the six patents you developed, and what impact did they have on battery management systems?
A: Each patent tries to solve a unique problem in a battery management system, especially in a battery charger design. For example, one of the patents addresses the issue of shoot-through current whenever a charger is plugged into a device. This current, if not controlled, can be damaging to the device. The other patent is solving a problem wherein a device can transition to very low power state: this is especially useful when a company ships its device to end customers or users. No one likes to receive a brand-new device that can’t be turned on because the battery has drained.

Figure 1: A patent illustration depicts a complex Battery Management System; each numbered item shows the parts of the design that need to be taken into consideration while verifying the complete system or product. The patents developed by Rohit Bhan solved issues around this particular product and helped better manage the battery powered devices. (Source: Rohit Bhan)

Q: Tell us about the e-methodologies you use in chip verification environments and testbench structures for ICs. When did you start incorporating e-methodologies into your work? How are the processes you are using for automotive battery management systems different from what you have or would use for electronics in other industries?
A: Design verification process and methodologies for automotive and consumer electronics differ significantly due to the varying requirements, constraints, and criticality of each application. Automotive designs must adhere to rigorous safety standards such as ISO 26262, which focuses on ensuring functional safety throughout the lifecycle of the system, and high reliability is essential due to the potential impact on vehicle safety. Verification methods employed for automotive battery management systems include formal verification of safety properties, fault injection testing, and compliance with safety integrity levels, along with extensive stress testing, fault tolerance analysis, and robustness checks under extreme conditions (e.g., high temperatures, vibrations). Automotive components have a long lifecycle and must be tested for longevity and durability over many years, and the verification process for this requires extensive documentation and certification to comply with automotive standards.

While consumer electronics also require reliability and safety, the standards are generally less stringent than automotive, and verification focuses more on ensuring functionality and performance, rather than rigorous safety compliance. In this sector, Design Verification may not need to account for as extreme or varied environmental conditions, as compared to automotive applications. Consumer products typically have a shorter lifecycle and faster development cycles, which is a different challenge altogether.

Q: One of your recent innovations is in developing modelling techniques to speedup simulation and emulation. What is the significance of your work, and how will it impact chip development?
A: To answer this question, we first need to understand what modelling is and why it is needed. In a complex chip design, there are multiple design blocks, some are digital blocks and some are analog blocks. In an ideal world, we can simulate the entire chip as fast as the simulator allows, and quickly get through the design and development process. But in reality the simulation takes huge amounts of time and effort in addition to compute resources. One solution for managing this complexity is to create/write models that are developed to abstract and simplify designs. These models help predict chip functionality under various input conditions and help in optimizing simulation speed, and allow for rapid prototyping, so designers can quickly test ideas without needing a physical chip. Now, these models that are faster to simulate than an actual chip, based on the design complexity, could still be slower and consume a lot of compute resources and simulation time. Our modelling techniques help in improving these compute heavy models using mathematical analysis and equations to run faster simulation, which speeds turnaround time for designers and DV engineers. This modelling improvement helps drive up efficiency, reduce cost, and help teams to rapidly prototype and refine solutions based on simulation results.

Any improvement in the chip design cycle that can shorten the simulation time drastically shortens the overall product development cycle, and that will lead to faster time to market and increased revenue for a company.

Q: As a Senior Staff Electrical Engineer, how are you training individuals and teams to better utilize e-methodologies in developing efficient, reusable, state-of-the-art verification environments and testbench structures?
A: As chips keep getting smaller and their complexity keeps increasing, every company now understands the importance of design verification. Most companies welcome the idea of developing re-usable verification environments and testbench, and encourage engineers like me to attend various workshops and seminars where the focus is on best practices and evolving these methodologies. As a senior engineer I spend time on comprehensive documentation, documenting guidelines, and examples that illustrate reusable testbench structures and verification environments. I closely work with interns and fresh college graduates and mentor them through collaborative efforts. This helps in real time knowledge transfer in a practical application setup. I also work with tool vendors so that they implement updates to tools and programming languages based on our feedback from real-life project execution. Presenting case studies also helps demonstrate the successful implementation of reuse methodologies in past projects, and analyzing successes and challenges helps teams learn from real-world applications.

Within my company I am working on embedding reuse methodologies into the overall development and verification processes, ensuring they are part of the workflow from the beginning of projects, and implementing regular review processes in which multiple teams can showcase their verification environments and receive constructive feedback. Finally, I work on promoting a culture across the company that values reuse by recognizing and rewarding efforts to create reusable components, which further encourages team members to think about future applications while designing.

Q: With the advent of new technologies, how do you see your field evolving over the next five to ten years? What types of advantages and new challenges will electrical engineers in the semiconductor industry confront? And what guidance would you give to young engineers entering the semiconductor field, and more specifically in design verification?
A: Design verification is likely to evolve significantly over the next few years due to several key trends and technological advancements like Automation, AI integration, Quantum Computing and Emphasis on Reusability. With these advancements we will also face new challenges, such as the development of innovative and high performance chips. Increased automation will require more streamlining of current workflows and updated methodologies. Growing market demand will stress testbench and design verification efforts, and will need rapid evolution to necessitate faster delivery time to meet tight deadlines without compromising quality. With rapidly changing semiconductor environments and products, engineers will have to navigate a dynamic landscape of regulations related to environmental impact, safety, and data protection, adding complexity to design and manufacturing processes.

Any young engineer who wants to enter the semiconductor field and work in design verification should start by focusing on basics like digital and analog circuits and their design principles. They should familiarize themselves with hardware description languages like Verilog or System Verilog. The semiconductor field is evolving rapidly, so they should follow industry trends, attend workshops, and read relevant literature to keep their skills current. Develop strong analytical and critical thinking skills, as verification often involves identifying and resolving complex issues. Learn effective debugging strategies. Familiarize yourself with simulation tools and how to interpret results to quickly pinpoint issues. Finally, having good communication and collaboration skills are essential, as DV demands a lot of cross-functional team work and collaborative efforts with designers and other engineers.

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Rohit Bhan develops innovative semiconductor engineering solutions in advanced AMS/DMS verification